Publications
Software
- PBExplore
A Compiler-in-the-Loop Framework to explore Register Bypasses in Pipelined Embedded Processors
Conference
Papers
- Application-Specific Instruction Set Processor for H.264 On-Chip Encoder
Kyoungwon Kim, Sanghyun Park, and Yunheung Paek
ISOCC 2009 : International SoC Design Conference
- Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
Sanghyun Park, Aviral Shrivastava and Yunheung Paek
DATE 2008 : Proceedings of the International Conference on Design Automation and Test in Europe
- SPKM : A Novel Graph Drawing based Algorithm for Application Mapping onto Coarse-Grained Reconfigurable Architectures
Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, Reiley Jeyapaul, and Yunheung Paek
ASPDAC 2008 : 13th Asia and South Pacific Design
Automation Conference
- Bypass Aware Instruction Scheduling for Register File Power Reduction (Best
Paper Award)
Sanghyun Park, Aviral Shrivastava, Nikil Dutt,
Alex Nicolau, Yunheung Paek, and Eugene Earlie
LCTES 2006 : Proceedings of the 2006 ACM SIGPLAN/SIGBED conference
on Language, compilers and tool support for embedded systems
Also published in ACM SIGPLAN Notices, Volume 41, Issue 7 (July 2006), ISSN 0362-1340
Workshop Papers
Journal Articles
- Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architecture NEW
Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Sanghyun Park, and Yunheung Paek
TCAD : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume 28, No. 3, page 461-466, ISSN 0278-0070
- A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained Reconfigurable Architectures NEW
Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, and Yunheung Paek
TVLSI : IEEE Transactions on Very Large Scale Integration Systems
Volume 17, No. 17, page 1565-1579, ISSN 1063-8210
- Register File Power Reduction Using Bypass Sensitive Compiler
Sanghyun Park, Aviral Shrivastava, Nikil Dutt, Alex Nicolau, Yunheung Paek, and Eugene Earlie
TCAD : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume 27, Issue 6, page 1155-1159, ISSN 0278-0070
- Automatic Design Space Exploration of Register Bypasses in Embedded Processors
Aviral Shrivastava, Sanghyun Park, Eugene Earlie, Nikil Dutt, Alex Nicolau, and Yunheung Paek
TCAD : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume 26, Issue 12, page 2102-2115, ISSN 0278-0070
Domestic Papers
Co-Authors
- Yunheung Paek (Seoul National University,
Korea)
- Aviral
Shrivastava(Arizona State University, USA)
- Nikil Dutt (University of California, Irvine,
USA)
- Alex Nicolau (University of California, Irvine,
USA)
- Ilya Issenin(University of California, Irvine, USA)
- Eugene
Earlie (Intel, USA)
- Doosan Cho (Seoul National University, Korea)
- Jonghee Yoon (Seoul National University, Korea)
- Minwook Ahn (Seoul National University, Korea)
- Reiley Jeyapaul (Arizona State University, USA)
- Taesong Kim (Seoul National University, Korea)
- Kyoungwon Kim (Seoul National University, Korea)
Reviews
- TCAD
- SCOPES'08
- HiPEAC'07
- ASPDAC'07
- CASES'06
- APLAS'06
- LCTES'04
- SCOPES'04
- ICCAD'04